SoftSSD-Platform

Overview

SoftSSD Highlights

• Full-Featured flash firmware atop multi-core processors
  • FTL (Flash Translation Layer): Coroutine-based Address mapping & storage management; automatic task switching, with enhanced concurrency, system responsiveness, and throughput.
  • FIL (Flash Interface Layer): Queue-based low-level flash transactions; efficient data communication.
  • ECC (Error Correction Code) Engine: Ensures data integrity through error detection and correction.
• Software-hardware acceleration design
  • PCIe Interface, with FPGA-based physical layer & data link layer implementation.
  • DMA Interface, with offloaded Transaction Layer Packet (TLP) processing for improved performance.
  • Coding/Decoding, with interleaved storage of data blocks and code bits.

Device Features

• Our platform features a heterogeneous computing architecture, integrating programmable ARM Cortex® application processors with a high-performance FPGA fabric on a single chip.
  • Our SSD development platform is built around the Xilinx Zynq® UltraScale+™ MPSoC as the core board.
  • This combination enables flexible and efficient execution of both control-plane tasks (on the ARM cores) and data-plane acceleration (in the FPGA logic).
• More features can be found in Introduction to SoftSSD.

Price: 32,000 HKD

For inquiries about this platform:

• Email: softssd1@gmail.com

The details for platform deployment can be found at:

• Development Notes.

• A Step-by-step Guide.

• A use case for on-disk vector search

Reference Paper:

• SoftSSD Paper
• SoftSSD Use Case Paper #1